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Books by Vijanth Sagayan Asirvadam

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  • by Vijanth Sagayan Asirvadam, Rosdiazli Ibrahim, Nordin Saad, et al.
    £93.99

    Therefore, to address these issues, the book proposes control strategies that retain the simplicity of PID in terms of ease of tuning and structure, while improving on the performance of the closed-loop system with regard to stochastic network delays and mismatches.

  • by Jahanzeb Anwer, Nor Hisham Bin Hamid & Vijanth Sagayan Asirvadam
    £43.99

    As the MOSFET dimensions scale down to nanoscale level, the reliability of circuits based on these devices decreases. Therefore, a mechanism has to be devised that can make the nanoscale systems perform reliably using unreliable circuit components. The solution is fault-tolerant circuit design. Markov Random Field (MRF) is an effective approach that achieves fault-tolerance in integrated circuit design. The previous research on this technique suffers from limitations at the design, simulation and implementation levels. As improvements, the MRF fault-tolerance rules have been validated for a practical circuit example. The simulation framework is extended from thermal to a combination of thermal and random telegraph signal noise sources to provide a more rigorous noise environment for the simulation of nanoscale circuits. Moreover, an architecture-level improvement has been proposed in the design of previous MRF gates. The re-designed MRF is termed as Improved-MRF. By simulating various test circuits in Cadence, it is found that Improved-MRF circuits are 400 whereas MRF circuits are only 10 times more noise-tolerant than the CMOS alternatives.

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