Books in the Systems series

This book focuses on the future directions of the static scheduling and dynamic load balancing methods in parallel and distributed systems. It provides an overview and a detailed discussion of a wide range of topics from theoretical background to practical, state-of-the-art scheduling and load balancing techniques.

Almost all software solutions are developed through academic research and implemented only in prototype machines, thus leaving the field of software techniques for maintaining the cache coherence widely open for new research and development. This book is a collection of all the representative approaches to software coherence maintenance and includes a number of related studies in the performance evaluation field. The illustrates state-of-the-art software solutions for cache coherence maintenance in shared-memory multiprocessors. It begins with a set of four overview of the cache coherence problem and introduces software solutions to the problem. The text defines and details static and dynamic software schemes, techniques for modeling performance evaluation mechanisms, and performance evaluation studies. The book is intended for the experienced reader in computer engineering but possibly a novice in the topic of cache coherence. It also provides an in-depth understanding of the problem as well as a comprehensive overview for multicomputer designers, computer architects, and compiler writers. In addition, it is a software coherence reference handbook for advanced undergraduate and typical graduate students in multiprocessing and multiprogramming areas.

This book is intended to be a practical guide for eclectic scientists and engineers who find themselves in need of implementing warping algorithms and comprehending the underlying concepts.

Presents the parallel implementation aspects of all major artificial network models. The text details implementations on various processor architectures built on different hardware platforms, ranging from large parallel computers to MIMD machines using transputers and DSPs.

Presents a survey of both distributed shared memory (DSM) efforts and commercial DSM systems. Distributed Shared Memory discusses relevant issues that make DSM concepts one of the most attractive approaches for building large-scale, high-performance multiprocessor systems. The book provides a general introduction to the DSM field as well as a broad survey of the basic DSM concepts, mechanisms, design issues, and systems. Distributed Shared Memory: Concepts and Systems concentrates on basic DSM algorithms, their enhancements, and their performance evaluation. In addition, it details implementations that employ DSM solutions at the software and hardware level. The authors deliver a research and development reference that provides state-of-the-art information that will be useful to architects, designers, and programmers of DSM systems.

Combines VHDL and synthesis in an easy-to-follow step-by-step sequence. This approach addresses common mistakes and hard-to-understand concepts in a way that eases learning. Digital Design and Modeling with VHDL and Synthesis introduces VHDL with closely related practical design examples, simulation waveforms, and schematics so you can better understand their correspondence and relationship. This book is the result of the K.C. Chang's extensive experience in both design and teaching. Many of the design techniques and design considerations, illustrated throughout the chapters, are examples of real designs.

This book provides an in-depth study concerning a claqss of problems in the general area of load sharing and balancing in parallel and distributed systems. The authors present the design and analysis of load distribution strategies for arbitrarily divisible loads in multiprocessor/multicomputer systems subjects to the system constraints in the form of communication delays. In particular, two system architecture-single-level tree or star network, and linear network-are thoroughly analyzed. The text studies two different cases, one of processors with front-ends and the other without. It concentrates on load distribution strategies and performance analysis, and does not cover issues related to implementation of these strategies on a specific system. The book collates research results developed mainly by two groups at the Indian Institute of Science and the State University of New York at Stony Brook. It also covers results by other researchers that have either appeared or are due to appear in computer science literature. The book also provides relevant but easily understandable numerical examples and figures to illustrate important concepts. It is the first book in this area and is intended to spur further research enabling these ideas to be applied to a more general class of loads. The new methodology introduced here allows a close examination of issues involving the integration of communication and computation. In fact, what is presented is a new "calculus" for load sharing problems.

K.C. Chang presents an integrated approach to digital design principles, processes, and implementations to help the reader design increasingly complex systems within shorter design cycles. Chang introduces digital design concepts, VHDL coding, VHDL simulation, synthesis commands, and strategies together. Digital Systems Design with VHDL and Synthesis focuses on the ultimate product of the design cycle: the implementation of a digital design. Many of the design techniques and considerations illustrated in the text are examples of actual real-world designs. Unique features of the book include the following: VHDL code explained line by line to capture the logic behind the design concepts Simulation waveforms, synthesized schematics, and results are shown, verified, and analyzed VHDL code is synthesized and commands and strategies are discussed Variations on the design techniques and common mistakes are addressed Demonstrated standard cell, gate array, and FPGA three design processes, each with a complete design case study Test bench, post-layout verification, and test vector generation processes are illustrated

As computers become more complex, the number and complexity of the tasks facing the computer architect also increase. Computer performance often depends on the design parameters and intuition that must be supplemented by performance studies to enhance design productivity. Performance Modeling for Computer Architects introduces computer architects to computer system performance models and shows how they are relatively simple, inexpensive to implement, and sufficiently accurate for most purposes. The book discusses the development of performance models based on queuing theory and probability. The text also shows how performance models are used to provide quick approximate calculations to indicate basic performance trade-offs and to narrow the range of parameters considered when determining system configurations. Performance models can demonstrate how a memory system is to be configured, what the cache structure should be, and what effect incremental changes in cache size can have on the miss rate. A particularly deep knowledge of probability theory or any other mathematical field is not required to understand the papers in this volume.

This book is concerned exclusively with discrete-time queues and their applications to the performance modeling of communication and computer networks. Since most modern networks operate on the basis of time slotting, and transmit information in fixed length (packets or cells), it thus becomes natural to model such networks in discrete-time by associating a time slot in a physical network with the unit time in the corresponding discrete-time model. The book shows how, in this way, very accurate models that faithfully reproduce the stochastic behaviour of a communication or computer network can be constructed. The treatment is self contained, and progresses from basic probability theory and discrete-time queueing networks. These latter are applied to model the performance of numerous wide area satellite networks and local area networks, ranging in complexity from simple Aloha schemes to the timed token protocol of the FDDI network. The main objective of this book is to present a unified method for modeling any network access protocol as a discrete-time queueing network and t develop efficient solution techniques for these models. A significant number of the models and their solutions which are included have not previously appeared in the open literature. The text should prove useful to practitioners and researchers concerned with communication and computer network performance modeling, or anyone wanting a sound understanding of the application of discrete-time technique to this subject area.

Helps you ensure that your simulations are appropriate representations of real-world systems. The book concentrates on the differentiation between the assessment of a simulation tool and the verification and validation of general software products. It is a systematic, procedural, practical guide that you can use to enhance the credibility of your simulation models. In addition, it is a valuable reference book and a road map for software developers and quality assurance experts, or as a text for simulation methodology and software engineering courses. This book details useful assessment procedures and phases, discusses ways to tailor the methodology for specific situations and objectives, and provides numerous assessment aids. The reader can use these aids to support ongoing assessments over the entire life cycle of the model.

Answers the commonly asked questions about how digital signal processing--based machines work and what role DSP plays in the process. It shows you how DSP performs in real--test situations and uses mathematical concepts rather than derivations.