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A Pipelined Multi-core MIPS Machine
- Hardware Implementation and Correctness Proof
part of the Theoretical Computer Science and General Issues series
part of the Lecture Notes in Computer Science series
- Binding:
- Paperback
- Pages:
- 352
- Published:
- December 1, 2014
- Edition:
- 2014
- Dimensions:
- 155x235x19 mm.
- Weight:
- 5504 g.
Delivery:
1-2 weeks
Expected delivery: October 20, 2024
Description of A Pipelined Multi-core MIPS Machine
It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory.The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory.
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