Join thousands of book lovers
Sign up to our newsletter and receive discounts and inspiration for your next reading experience.
By signing up, you agree to our Privacy Policy.You can, at any time, unsubscribe from our newsletters.
A Pipelined Multi-core MIPS Machine
- Hardware Implementation and Correctness Proof
part of the Theoretical Computer Science and General Issues series
part of the Lecture Notes in Computer Science series
- Binding:
- Paperback
- Pages:
- 352
- Published:
- November 30, 2014
- Edition:
- 2014
- Dimensions:
- 155x235x19 mm.
- Weight:
- 5504 g.
Delivery:
1-2 weeks
Expected delivery: January 2, 2025
Extended return policy to January 30, 2025
Description of A Pipelined Multi-core MIPS Machine
It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory.The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory.
User ratings of A Pipelined Multi-core MIPS Machine
Rate this book
In order to rate this book you must be logged in.Others also bought..
Find similar books
The book A Pipelined Multi-core MIPS Machine can be found in the following categories:
You can, at any time, unsubscribe from our newsletters.
© 2024 Tales
All packages are shipped from our warehouse in the UK.
Company address: Esromgade 15, 3. - 2200 - DK
Registered company number: DK43351621
