Join thousands of book lovers
Sign up to our newsletter and receive discounts and inspiration for your next reading experience.
By signing up, you agree to our Privacy Policy.You can, at any time, unsubscribe from our newsletters.
Designing Reliable and Efficient Networks on Chips
part of the Lecture Notes in Electrical Engineering series
- Binding:
- Hardback
- Pages:
- 198
- Published:
- April 20, 2009
- Edition:
- 2009
- Dimensions:
- 155x235x12 mm.
- Weight:
- 1050 g.
Delivery:
2-3 weeks
Expected delivery: December 19, 2024
Extended return policy to January 30, 2025
Description of Designing Reliable and Efficient Networks on Chips
Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge.
User ratings of Designing Reliable and Efficient Networks on Chips
Rate this book
In order to rate this book you must be logged in.Others also bought..
Find similar books
The book Designing Reliable and Efficient Networks on Chips can be found in the following categories:
You can, at any time, unsubscribe from our newsletters.
© 2024 Tales
All packages are shipped from our warehouse in the UK.
Company address: Esromgade 15, 3. - 2200 - DK
Registered company number: DK43351621
