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Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
- Binding:
- Paperback
- Pages:
- 146
- Published:
- May 11, 2018
- Edition:
- 12018
- Dimensions:
- 155x235x0 mm.
- Weight:
- 2467 g.
Delivery:
1-2 weeks
Expected delivery: December 5, 2024
Description of Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.
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