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Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs
- Binding:
- Hardback
- Pages:
- 131
- Published:
- March 11, 2021
- Edition:
- 12021
- Dimensions:
- 155x235x0 mm.
- Weight:
- 454 g.
Delivery:
2-3 weeks
Expected delivery: October 20, 2024
Description of Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs
transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor) as alternatives to attenuate the unwanted effects on FinFET logic cells.
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